Techniques for IC Symbolic Layout and Compaction

Techniques for IC Symbolic Layout and Compaction

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IEEE Transactions on CAD, 9(2): 113-125. ... Conference on Computer Design: VLSI in Computers aamp; Processors, pages 302a€“307, IEEE, Rye Brook, NY, October 1986. ... Vulcan manual pages. ... [51] [52] [53] [54] [60] [61] Y-Z Liao and C. 27.4.


Title:Techniques for IC Symbolic Layout and Compaction
Author: Jeffrey Lyn Burns
Publisher: - 1990
ISBN-13:

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